% Encoding: UTF-8

@Article{Mavaddat1988,
  author    = {Mavaddat, Farhad and Behrooz Parhami},
  title     = {{URISC}: The Ultimate Reduced Instruction Set Computer},
  journal   = {Intl. J. Elect. Enging. Educ.},
  year      = {1988},
  volume    = {25},
  pages     = {327--334},
  file      = {:by-author/M/Mavaddat/1988_Mavaddat_327.pdf:PDF},
  url       = {https://web.ece.ucsb.edu/~parhami/pubs_folder/parh88-ijeee-ultimate-risc.pdf},
  keywords  = {CS, computer architecture, hardware, CPU design, teaching, teaching electronics},
  owner     = {saulius},
  timestamp = {2012.10.21},
}

@Presentation{Ward2003,
  author    = {Steve Ward and Chris Terman},
  title     = {Building the Beta},
  year      = {2003},
  course    = {Computation Structures},
  file      = {:by-author/W/Ward/2003_Ward.pdf:PDF},
  keywords  = {CS, CPU-design, computer architecture, RISC},
  owner     = {saulius},
  timestamp = {2015.03.11},
  url       = {http://6004.csail.mit.edu/Spring02/handouts/L15-4up.pdf},
}

@TechReport{Patterson2003,
  author      = {David A. Patterson and David R. Ditzel},
  title       = {The case for the reduced instruction set computer},
  institution = {Computer Science Division, University of California; Bell Laboratories, Science Research Center},
  year        = {2003},
  comment     = {Contains examples of suboptimal complex CISC commands.},
  file        = {:by-author/P/Patterson/2003_Patterson_25.pdf:PDF},
  keywords    = {CS, computer architecture, RISC, CISC, critisism},
  owner       = {saulius},
  pages       = {25--33},
  timestamp   = {2019.02.17},
  url         = {https://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.68.9623},
}

@Article{Jamil1995,
  author    = {T. Jamil},
  title     = {{RISC} versus {CISC}},
  journal   = {{IEEE} Potentials},
  year      = {1995},
  volume    = {14},
  number    = {3},
  pages     = {13--16},
  doi       = {10.1109/45.464688},
  file      = {:by-author/J/Jamil/1995_Jamil_13.pdf:PDF},
  keywords  = {CS, RISC, CISC, computer architecture},
  owner     = {saulius},
  publisher = {Institute of Electrical and Electronics Engineers ({IEEE})},
  timestamp = {2019.07.17},
}

@InProceedings{ARM1998,
  author    = {{ARM}},
  title     = {Application Note 53 Configuring ARM Caches},
  year      = {1998},
  pages     = {1--11},
  comment   = {Original file name: "DAI0053B_cache_config.pdf".},
  file      = {:by-author/A/ARM/1998_ARM_1.pdf:PDF},
  keywords  = {CS, computer architecture, ARM, RISC, memory cache},
  owner     = {saulius},
  timestamp = {2020.07.26},
  url       = {https://documentation-service.arm.com/static/5f19525920b7cf4bc524c651},
}